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[Embeded-SCM DevelopVHDLRAM

Description: 介绍vhdl硬件描述语言的特点及设计思想,运用vhdl硬件描述语言实现计算机原理实验中RAM存储器的设计方法,重点描述了对传统计算机组成原理实验中移植到基于CPLD平台的思想-introduced vhdl hardware description language features and design ideas, vhdl use hardware description language computer science experiments RAM memory design, Description of key computer components of the traditional principle experiment to transplant platform based on the idea of CPLD
Platform: | Size: 30720 | Author: 刘浏 | Hits:

[VHDL-FPGA-VerilogCPLDxiaoche

Description: 智能机器小车主要完成寻迹功能,由机械结构和控制单元两个部分组成。机械结构是一个由底盘、前后辅助轮、控制板支架、传感器支架、左右驱动轮、步进电机等组成。控制单元部分主要由主要包含传感器及其调理电路、步进电机及驱动电路、控制器三个部分。本设计的核心为控制器部分,采用Altera MAX7000S系列的EPM7064LC84-15作主控芯片。CPLD芯片的设计主要在MAX+plusⅡ10.0环境下利用VHDL语言编程实现。驱动步进电机电路主要利用ULN2803作为驱动芯片。 -intelligent machines trolley track of the major functions by mechanical structure and control modules of two components. Mechanical structure is a chassis, after supporting wheels, the control panel stent, sensors stent, driving wheel around, Stepper motors, and other components. Some of the main control unit from the mainly contains sensors and conditioning circuits, and stepper motor drive circuit, the controller of three parts. The design for the core controller, Altera MAX7000S the EPM7064LC84-15 for the control chip. CPLD chip design mainly in MAX II plus 10.0 environment using VHDL programming. Stepper motor driver circuit using mainly driven ULN2803 chip.
Platform: | Size: 1024 | Author: lili | Hits:

[Embeded-SCM Developdigitalsecondwatch(VHDL)

Description: 应用VHDL、CPLD、EDA开发软件设计数字系统,能够显著增强设计的灵活性,提高产品的性能,减轻设计的工作量,缩短设计周期。传统的“固定功能集成块+连线”的设计方法正逐步地缩小应用范围,而基于芯片的设计方法正成为电子系统设计的主流。VHDL语言、CPLD/FPGA、EDA开发软件已成为设计复杂数字电路系统的重要工具。-use VHDL, CPLD, EDA software to design digital system, can significantly improve design flexibility, improve product performance, reduce the workload designed to shorten the design cycle. The traditional "fixed-function IC Alliance," The design method is to gradually narrow the scope of application, For the chip design is becoming electronic systems design. VHDL, CPLD/FPGA, EDA software development has become a complex digital circuit design system an important tool.
Platform: | Size: 1024 | Author: laiweidong | Hits:

[VHDL-FPGA-Verilogdpll0226

Description: 用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.
Platform: | Size: 184320 | Author: sss | Hits:

[VHDL-FPGA-VerilogDPLL0227+V+qt6

Description: 用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.
Platform: | Size: 278528 | Author: sss | Hits:

[VHDL-FPGA-Verilogpll1218

Description: 用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.
Platform: | Size: 108544 | Author: sss | Hits:

[Embeded-SCM Developvhdlcodes

Description: FPGA/CPLD集成开发环境ISE的使用详解 示例代码1-FPGA/CPLD Integrated Development Environment ISE Comments on the use of a code sample
Platform: | Size: 114688 | Author: 邓志斌 | Hits:

[Embeded-SCM Developvhdlcodes5

Description: FPGA/CPLD集成开发环境ISE使用详解实例-5-FPGA/CPLD integrated development environment IDE ISE example-5
Platform: | Size: 152576 | Author: 邓志斌 | Hits:

[Embeded-SCM DevelopVHDL_stepper-motor

Description: 用于CPLD的控制,VHDL编程,实现控制三相步进电机的正反转。-control for CPLD, VHDL programming, control of three-phase stepper motor rotating direction.
Platform: | Size: 281600 | Author: 胡迪 | Hits:

[Embeded-SCM Developrs232lan

Description: CPLD 9536 程序 我自己用的代码. VHDL语言-CPLD 9,536 procedures for my own use code. VHDL
Platform: | Size: 621568 | Author: 罗明 | Hits:

[Embeded-SCM Developvhdlcodes8

Description: FPGA/CPLD集成开发环境ise的使用详解 示例代码8-FPGA/CPLD integrated development environment IDE ise the sample code 8
Platform: | Size: 15360 | Author: bigbibby | Hits:

[Embeded-SCM Developlcd_restored

Description: 这是一个用VHDL +图形法在CPLD内部搭建的液晶显示的驱动程序。液晶是ocmj5*10系列-This is a graphic with VHDL in CPLD internal structures of the LCD driver. LCD is ocmj5 Series 10*
Platform: | Size: 769024 | Author: 王伟晓 | Hits:

[VHDL-FPGA-VerilogLED

Description: 基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code
Platform: | Size: 108544 | Author: 林晋阳 | Hits:

[Embeded-SCM DevelopVHDL

Description: MARS-7128-S CPLD开发板VHDL 源码
Platform: | Size: 2562048 | Author: 史蒙克 | Hits:

[Embeded-SCM Developxapp354_vhdl

Description: 用CPLD实现NAND FLASH接口的VHDL源码-Using CPLD realize NAND FLASH interface VHDL source code
Platform: | Size: 871424 | Author: xillinx | Hits:

[Embeded-SCM Developvhdl

Description:
Platform: | Size: 3072 | Author: math | Hits:

[VHDL-FPGA-Verilog3_Freq

Description: 3倍频实用稳定算法的VHDL实现(XILINX CPLD)-3 octave practical VHDL realize stable algorithm (XILINX CPLD)
Platform: | Size: 2048 | Author: sean | Hits:

[Embeded-SCM DevelopADS8361

Description: TI公司的AD8361的VHDL控制程序,可实现CPLD的采集。-TI s AD8361 the VHDL control procedures, the acquisition can be realized CPLD.
Platform: | Size: 1024 | Author: 祝箭 | Hits:

[VHDL-FPGA-VerilogCpld

Description: atmel公司arm926 开发办cpld源代码vhdl写的, 供大家参考-Atmel CPLD Development Office Company ARM926 VHDL source code written for your information
Platform: | Size: 38912 | Author: 邱劲松 | Hits:

[VHDL-FPGA-VerilogVHDL

Description: VHDL硬件描述语言与数字逻辑电路设计——学习FPGA/CPLD时可参考-VHDL hardware description language and digital logic circuit design- to learn FPGA/CPLD can reference
Platform: | Size: 18691072 | Author: 陨星 | Hits:
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